InTheLoop | 09.15.2014
Cancer Screening Algorthim Wins First Place at ISBI 2014
The task of identifying abnormal cells in uterine cancer screening tests (called Pap smears) has typically fallen to people manually examining slides. Sample variabilities and disagreements among observers can lead to false negatives. Earlier this year, several researchers issued a challenge in conjunction with the IEEE International Symposium on Biomedical Imaging (ISBI 2014) in Beijing, China for tools to extract the boundaries of individual cytoplasm and nucleus from overlapping cervical cell images.
The winning method, developed by Daniela Ushizima of the Lawrence Berkeley National Laboratory (Berkeley Lab), Andrea Bianchi and Claudia Carneiro of the Federal University of Ouro Preto (UFOP) in Brazil, included pattern recognition algorithms developed by the Department of Energy’s Center for Applied Mathematics for Energy Research Applications (CAMERA) to characterize new materials. Their method, which was judged to be the fastest and most accurate, will be highlighted in Washington D.C. on September 16, 2014, when Secretary of Energy Ernest Moniz hosts National Lab Day on Capitol Hill. »Read more
Cori Featured in ASCR Discovery
The September 10 issue of ASCR Discovery profiled NERSC's next supercomputer. Nicknamed Cori in honor of Nobel-prize winning biochemist Gerty Cori, the system will pack an overall ten-fold increase in application performance over Hopper. But it’s not primarily Cori’s anticipated stellar performance that makes NERSC Director Sudip Dosanjh see the supercomputer as a great leap toward exascale computing: Cori will do it with less energy. “With Cori we will begin transitioning the broad range of (DOE) Office of Science codes that run at NERSC to energy-efficient, many-core computer architectures," said Dosanjh. »Read more.
John Shalf Gives Invited Talk to Cray Engineers
John Shalf, NERSC’s chief technologist and head of CRD’s Computer and Data Sciences Department, was one of two invited speakers at an annual workshop for Cray’s principal and senior principal engineers, “essentially the top technical talent at Cray,” according to Peg Williams, Cray’s senior vice president for HPC systems. On Wednesday, Sept. 10, Shalf gave a 45-minute presentation on how workloads are changing at NERSC and more broadly in DOE. He then spent about an hour in a Q&A session with the Cray engineers. The workshop was held Sept. 9-11 in Seattle.
Registration Now Open for 2014 Technology Exchange Conference
Registration is now open for the 2014 Technology Exchange, a leading technical event in the global research and education networking community. The annual meeting is co-organized by ESnet, the Department of Energy’s Energy Sciences Network (ESnet), and Internet2. The conference will be held Oct. 27-30 in Indianapolis.
The annual meeting brings together a wide range of technical experts to address the challenges facing the research and education networking community as it supports data-intensive research. The conference will be hosted this year by Indiana University.
According to the conference web site, the technical challenges facing organizations today are not confined to the network alone and require the convergence of networking, computing, storage and other, emerging technologies. The Technology Exchange brings together the community’s technology visionaries, including the most inventive chief technologists, scientists, engineers, architects, operators and students in the world, to address these demands.
This Week's CS Seminars
CITRIS Seminar–Digital Agenda for Europe
Wednesday, September 17, 12 p.m. – 1 p.m., Banatao Auditorium, 310 Sutardja Dai Hall, UC Berkeley
Francisco García Morán, Chief IT Advisor, European Commission
The European Commission launched in March 2010 the Europe 2020 Strategy to exit the crisis and prepare the EU economy for the challenges of the next decade. Europe 2020 sets out a vision to achieve high levels of employment, a low carbon economy, productivity and social cohesion, to be implemented through concrete actions at EU and national levels. This battle for growth and jobs requires ownership at top political level and mobilization from all actors across Europe.
The Digital Agenda for Europe is one of the seven flagship initiatives of the Europe 2020 Strategy, set out to define the key enabling role that the use of Information and Communication Technologies (ICT) will have to play if Europe wants to succeed in its ambitions for 2020. Sponsored by CITRIS (Center for Information Technology Research in the Interest of Society).
UCB Seminar–The Rise of the Expert Amateur: DIY Culture and the Evolution of Computer Science
Thursday, Sept. 18, 12:30 p.m.-1:30 p.m., Soda Hall, Wozniak Lounge
Eric Paulos, UC Berkeley
We are at an important technological inflection point. Most of our computing systems have been designed and built by professionally trained experts (i.e. us — computer scientists, engineers, and designers) for use in specific domains and to solve explicit problems. Artifacts often called "user manuals" traditionally prescribed the appropriate usage of these tools and implied an acceptable etiquette for interaction and experience. A fringe group of individuals usually labeled "hackers" or "amateurs" or "makers" have challenged this producer-consumer model of technology by creating novel hardware and software features to "improve" our research and products while a similar creative group of technicians called "artists" have redirected the techniques, tools, and tenets of accepted technological usage away from their typical manifestations in practicality and product. Over time the technological artifacts of these fringe groups and the support for their rhetoric have gained them a foothold into computing culture and eroded the established power discontinuities within the practice of computing research. We now expect our computing tools to be driven by an architecture of open participation and democracy that encourages users to add value to their tools and applications as they use them. Similarly, the bar for enabling the design of novel, personal computing systems and "hardware remixes" has fallen to the point where many non-experts and novices are readily embracing and creating fascinating and ingenious computing artifacts outside of our official and traditionally sanctioned academic and industrial research communities.
But how have we as "expert" practitioners been influencing this discussion? By constructing a practice around the design and development of technology for task based and problem solving applications, we have unintentionally established such work as the status quo for the human computing experience. We have failed in our duty to open up alternate forums for technology to express itself and touch our lives beyond productivity and efficiency. Blinded by our quest for "smart technologies" we have forgotten to contemplate the design of technologies to inspire us to be smarter, more curious, and more inquisitive. We owe it to ourselves to rethink the impact we desire to have on this historic moment in computing culture. We must choose to participate in and perhaps lead a dialogue that heralds an expansive new acceptable practice of designing to enable participation by experts and non-experts alike. We are in the milieu of the rise of the "expert amateur." We must change our mantra: not just performance, completeness, and usability but openness, usefulness and relevancy to our world, its citizens, and our environment. This talk will explore elements of the DIY and maker culture and its relevancy to research questions across computational hardware, languages, and systems. Ultimately, this talk will outline and argue for expanding the design territory and potential opportunities for all of us to collaborate and benefit as a society from this cultural movement.
CS Exascale Seminar–The Interaction of Programming Languages and Their Runtimes with Interconnect Capabilities
Friday, Sept. 19, 11 a.m. - 12:30 p.m., Bldg. 50B Room 4205
Khaled Ibrahim, Lawrence Berkeley National Laboratory
The interconnect designs in extreme-scale systems influence runtime designs, programming models, and application tuning strategies. They are also influenced by the trends in node designs including the increase in core count, the decrease in memory per core, and the need to support strong-scaling workloads. In this talk, we present an overview of recent advances in interconnect designs. We then discuss how runtime designs try to exploit them.