SmartSensors, Edge Computing
Experimental facilities like the Advanced Light Source (ALS) and the National Center for Electron Microscopy (NCEM) are experiencing exponential increases in data production rates from emerging detectors. The volume and rate of these increasingly large experimental datasets threaten to overwhelm both wide area networks and HPC center ingest rates. For example, the 4D Camera at NCEM can produce continuous electron images every 11 microseconds. That’s about 60 times faster than what was possible with previous high-speed electron detectors. And currently, all data is streamed in real-time via a 400 Gbps 1 km optical link to supercomputers at NERSC for inline processing and analysis.
Much like how experiments today benefit from custom sensors and associated accelerators/algorithms, future experiments will benefit from specialized computers to analyze and reduce the incoming data. Edge computing techniques offer an opportunity to reduce the load by moving some of the preprocessing closer to the detectors.
Smart Sensors: BXPE Framework for FPGA-accelerated Computing for NCEM and ALS
With experimental facilities’ data production rates exponentially increasing, there is a greater need to move computation closer to the experimental source. To this end, we have developed the Berkeley eXtensible Processing Engine (BXPE) Framework, which allows experimentalists to utilize FPGAs stitched into the network pipeline to process data in real-time as it flows over the network. We provide a Python-tooling front-end to allow for the development of algorithms using this framework. In this particular design, we ported the NCEM Center-of-Mass and the ALS convolution applications to this edge computing framework. Contact: Farzad Fatollahi-Fard
QUASAR: Accelerated Classic Control for Quantum Computers
Continuing the scaling of quantum computers hinges on building classical control hardware pipelines that are scalable, extensible, and provide real-time response. The instruction set architecture (ISA) of the control processor provides functional abstractions that map high-level semantics of quantum programming languages to low-level pulse generation by hardware. In this paper, we provide a methodology to quantitatively assess the effectiveness of the ISA to encode quantum circuits for intermediate-scale quantum devices with O(10^2) qubits. The characterization model that we define reflects performance, the ability to meet timing constraint implications, scalability for future quantum chips, and other important considerations making them useful guides for future designs. Using our methodology, we propose scalar (QUASAR) and vector (qV) quantum ISAs as extensions to RISC-V that outperform other ISAs 4-40x in metrics such as circuit encoding efficiency, the ability to meet real-time gate cycle requirements of quantum chips, and the ability to scale to more qubits. Contact: Anastasiia Butko
Large-scale Self-driving 5G Network for Science
Wireless technologies and network advances with 5G and even beyond-5G, are ushering in a new era for Internet of Things (IoT), with intelligent sensors bringing complex temporal and spatial challenges to the way we do science across multiple DOE-related activities. While bringing many advantages, such as connectivity in urban non-wired areas, mmWave technologies, and new upload/download speeds with less latency, it also brings unprecedented data demands, new hardware, and the desire to connect seamlessly across multiple network domains. We will be baking artificial intelligence (AI) into individual edge nodes for intelligent edges, connecting to DOE facilities like network and data centers, for intelligent core - forming a new network ecosystem for science. Contact: Anastasiia Butko